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Posted on 07 January 2019

Dynamic Properties of MOSFETs

 

 

 

 

 

 

 

Power MOSFET properties are strongly influenced by the parasitic elements in the real structure.

Forward off-state and avalanche breakdown

If a positive drain-source voltage VDS and a gate-source voltage VGS below the gate-source threshold voltage level VGS(th) is applied, only a very small cut-off current IDSS will flow between the drain and source terminal. When VDS rises, IDSS increases slightly at first. Above a specified, maximum rated drain-source voltage VDSS, there will be an avalanche breakdown of the PN-junction p+ well / n- drift area / n+ epitaxy layer (drain-source breakdown voltage V(BR)DSS ). Physically speaking, V(BR)DSS corresponds roughly to the breakdown voltage VCER of the parasitic bipolar NPN transistor in the MOSFET structure, generated by the following sequence of layers: n+ source region (emitter) / p+ well (base) / n- drift area / n+ epitaxy layer drain region (collector).

The multiplication current generated during avalanche breakdown in the collector-base diode can lead to MOSFET destruction caused by bipolar transistor turn-on. Base and emitter regions are, however, almost shorted by the emitter metallisation; between them there is nothing but the lateral resistance of the p+ well. Various design related measures, e.g. small MOSFET cells, a homogenous cell field, low ohmic p+  wells, optimum outer structures, and very homogenous technological processes can produce a very low breakdown current per cell which - under precisely specified conditions - will not yet trigger turn-on of the bipolar transistor structure. For these "avalanche  resistant" MOSFET chips, datasheets specify a permissible avalanche energy EA for single pulses or periodic loads (limited by the maximum rated chip temperature).

MOSFET structure

Figure 1. MOSFET structure

Since absolute symmetry cannot be guaranteed for power modules working with several MOSFET chips connected in parallel, it is not permissible to use more than the maximum EA value guaranteed for a single chip.

On-state (1st quadrant)

The forward on-state at a positive drain-source voltage VDS and positive drain current ID comprises two characteristic curve areas:

Active region (pinch-off area)

With a gate-emitter voltage VGE that hardly exceeds the gate-emitter threshold voltage VGE(th), a relatively high voltage share will be depleted through the channel owing to current saturation (horizontal part of the output characteristics). The drain current ID is controlled by VGS . As a measure for the transfer behavior, the forward transconductance gfs is defined as

g_{fs} = \Delta I_D / \Delta V_{DS} = I_D / (V_{GS} - V_{GS(th)})

Forward transconductance rises in proportion to the increase in drain current ID and the drain-source voltage VDS and falls as chip temperature increases. In the switching mode that is exclusively permissible for power modules working with several MOSFET chips connected in parallel, the pinch-off area is only run through during turn-on and turn-off. Stationary module operation in the pinch-off area is not permissible because VGS(th) drops when the temperature rises, meaning that even small differences between the individual chips may cause thermal instability.

Ohmic characteristic area

The ohmic characteristic area (steep part of the output characteristics), which corresponds to on state during switching operations, is reached when ID is determined by the outer circuit only. On-state behavior is charaterised by the drain-source on-resistance RDS(on) as a quotient of changing drain-source voltage VDS and drain current ID. The on-resistance RDS(on) is dependent on the gate-source voltage VGS and the chip temperature. In the operating temperature range of a MOSFET, RDS(on) is almost doubled (in the range between 25°C and 125°C).

Inverse operation (3rd quadrant)

In inverse mode, the MOSFET has a diode characteristic at VGS < VGS(th). This behavior is caused by the parasitic diode in the MOSFET structure; the on-state voltage of the collector-(source)-base-(drain)-pn-junction ("inverse diode"). The bipolar current flow through this diode determines the on-state behaviour of the MOSFET in reverse direction, when the channel is closed.

Generally speaking, the bipolar inverse diode can be utilised within the current limits specified for the MOSFET. Practice, however, often shows that

  • inverse diodes cause relatively high on-state losses which must be dissipated together with the MOSFET losses and
  • that the poor turn-off behaviour and relatively low dv/dt limits of these PIN diodes are responsible for the practical application limits of MOSFET bridge circuits in processes that require hard switching.

Switching behaviour

The switching behaviour (switching velocity, losses) of MOSFET power modules is determined by their structural, internal capacitances and the internal and terminal resistances. Contrary to the ideal of powerless voltage control via the MOSFET gate, frequency dependent control power is required; this is owing to the recharge currents of the internal capacitances which are needed for switching. Furthermore, the commutation processes are affected by the parasitic connection inductances present in the components and connections and generated by connecting transistor chips in power modules; they induce transient overvoltages and may cause oscillations due to the circuit and transistor capacitances.

The switching behaviour of power MOSFETs can be described as resulting from the transistor's internal capacitances and resistances. When the MOSFET is turned off, CGD is low and approximately equal to CDS . During on-state, CGD will increase rapidly as soon as the gate-source voltage has exceeded the drain-source voltage; this is due to inversion in the enhancement layer below the gate regions.

Comparing the turn on and turn off behaviour of MOSFETs and IGBTs

Retroactive effects occur due to changes in the drain-source voltage as well as parasitic capacitances. The switching behaviour such as switching speed and switching losses for MOSFETs and IGBTs are usually determined by their internal capacitances. These internal capacitances are highly dependent on the applied voltage. The result of these capacitances is commonly refered to as Miller-Plateau since the gate emitter voltage (VGE) remains constant even as current flows into the gate because the gate-emitter capacitance increases.

Miller Plateau

Figure 2. Miller Plateau

As opposed to the ideal wireless voltage control using a MOSFET or IGBT gate respectively, switching frequency dependent need for power control results from the required current during the switching process.

In general, the point at which the gate charge goes into the plateau region coincides with the peak value of the current. The knee in the gate charge however depends on the product with respect to time.

MOSFETs are unipolar components which means that only one type of charge carrier is involved in current transportation. The mid-zone which has low doping concentration is not flooded with both charge carriers. There is therefore neither a storage tank which must be cleared upon switching off nor is there any tail current. On account of this, MOSFETs can be switched on and off very fast.

The switching behaviour of parasitic bipolar diodes has a negative effect on many MOSFET applications. For low reverse MOSFETs, these parasitic diodes demonstrate very strong snap-off behavior and in doing so induce over voltages and vibrations upon turn-off.

 

For more information, please read:

Introduction to Metal Oxide Semiconductor Field Effect Transistors (MOSFETs)

Development of MOSFET Technologies

Criteria for Successful Selection of IGBT and MOSFET Modules

Gate Resistors – Principles and Applications

 

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