# Gate Resistors – Principles and Applications

Posted on 23 July 2012

This article provides information on the use of gate resistors (RG) to control IGBT switching. The information given in this application note contains tips only and does not constitute complete design rules; the information is not exhaustive. The responsibility for proper design remains with the user.

Introduction

The switching behaviour of power semiconductors is controlled by the gate capacitance recharge. This gate capacitance recharge may be controlled via a gate resistor. By using a typical positive control voltage (VG(on)) of +15V the IGBT is turned-on and turned-off at a negative output voltage (VG(off)) of typically -5 …-8…-15V. The dynamic IGBT performance can be adjusted by the value of the gate resistor. The gate resistor influences the IGBT switching time, switching losses, reverse bias safe operating area (RBSOA), short-circuit safe operating area (SCSOA), EMI, dv/dt, di/dt and reverse recovery current of the freewheeling diode. It has to be selected and optimized very carefully in accordance with the individual application parameters, e.g. IGBT technology, diode, switching frequency, losses, application layout, inductivity / stray inductance, DC-link voltage and driver capability. The complete design of an application must be viewed as a whole, with due considering of the above-mentioned parameters. Interactive effects within the whole application must be evaluated and accommodated.

### IGBT Switching Behaviour

The switching behaviour setting of each IGBT can be affected by the external resistor RG. As the input capacitance of an IGBT, which varies during switching time, has to be charged and discharged, the gate resistor will dictate what time is needed to do this by limiting the magnitude of the gate current (IG) pulses during turn-on and turn-off.

Due to the increase in the gate peak current, which is affected by reducing the resistor value RG(on) and RG(off), the turn-on and turn-off time will be shorter and the switching losses will be reduced. The following diagrams show switching losses and switching times depending on the selected gate resistor value.

What needs to be considered when reducing the value of the gate resistor is the di/dt generated when high currents are switched too fast. This is due to stray inductance present in the circuit, which produces a high voltage spike on the IGBT. This surge voltage can be estimated using the following equation.

This effect can be observed in the waveform shown for IGBT turn-off. The shaded areas show the relative value of the switching losses. The transient voltage spike on top of the collector-emitter voltage may destroy the IGBT, especially in short-circuit turn-off operation with a high di/dt. As shown in the following diagram, Vstray can be reduced by increasing the value of the gate resistor. Thus, the risk of IGBT destruction due to overvoltage can be eliminated.

In terms of the interlock / dead time between high side IGBT (TOP) and low side IGBT (BOT) in a half-bridge configuration, the influence of the gate resistor on the delay  time has to be considered. A large RG(off) increases the IGBT fall time, which is why the effective dead time may exceed the minimum dead time. This leads to an increased shoot-through tendency. Fast turn-on and turn-off leads to higher dv/dt and di/dt values respectively. Thus, more Electromagnetic Emissions (EMI) are produced and can bring about circuitry malfunction in application. The following table shows the influence of different gate resistor values on di/dt.

The following table provides an overview of tendencies in IGBT switching behaviour caused by changes in gate resistor values.

### Switching Behaviour of Free-Wheeling Diode

The switching behaviour of the free-wheeling diode is also affected by the gate resistor and limits the minimum value of the gate resistance. This means that the turn-on switching speed of the IGBT can be only increased up to a level compatible with the reverse recovery behaviour of the free-wheeling diode being used. A decrease in the gate resistor increases not only the overvoltage stress on the IGBT, but also on the free-wheeling diodes caused by the increased diC/dt. The following diagram depicts the typical dependency of the free-wheeling diode reverse recovery current IRRM on diF/dt, determined by the control of the given gate resistor RG(on) of the IGBT. The reverse recovery current increases with the commutation speed diF/dt. An increase in IRRM will also cause higher turn-off power dissipation in the free-wheeling diode.

In IGBT modules, SEMIKRON uses specially designed, optimised CAL (Control Axial Lifetime) diodes with soft recovery behaviour. This allows for a low peak reverse current and hence a lower turn-on current on the IGBTs in bridge circuits.

### Driving Output Stage

The driver output stage of a gate drive circuit is typically designed with two MOSFETs in totem pole configuration. Both gates of the MOSFETs are driven by the same signal. When the signal is high, the N-channel-MOSFET is on and when the signal is low, the P-channel-MOSFET is on. The result is a push-pull output configuration with two transistors. The MOSFET output stage is available with one or two outputs. The following table shows the different solutions for symmetrical or asymmetrical gate control.

This output stage has two outputs for easy asymmetrical gate control. This allows splitting the gate resistor into two resistors RG(on) and RG(off) for turn-on and turn-off, respectively. In this way, the most inevitable cross current from VG+ to VG-, generated during switching of the driver MOSFETs, can be limited. The main advantage,  however, is that this solution offers the possibility of separate optimization of turn-on and turn-off with regard to turn-on overcurrent, turn-off overvoltage spikes and short-circuit behaviour.

If only one output is available for the gate resistor, asymmetrical control can also be maintained. In order to adjust the turn-on and turn-off behaviour individually, a second resistor RG2 and a series diode can be placed in parallel to the gate resistor RG1. Increasing RG1 leads to an increase in IGBT turn-off time. The inductive peak overvoltage during turn-off will diminish. Increasing RG2 leads to an increase in turn-on time. The reverse peak current of the free-wheeling diode will diminish. This configuration induces a short-circuit in the MOSFET stage if no delay is considered when the MOSFETs are switched.

Output circuit with one gate resistor. The same resistor is used for turn-on and turn-off. Thus, the gate is controlled symmetrically. This configuration induces a short-circuit in the MOSFET stage, if no delay is considered during switching the MOSFETs.

### Gate Resistor Dimensioning

A gate resistor must demonstrate optimum switching behaviour with regard to low switching losses, no IGBT module oscillation, low diode peak reverse recovery current and maximum dv/dt limitation. Some hints on gate resistor dimensioning are given below:

• Typically, IGBT modules with a large current rating will be driven with smaller gate resistors; similarly, small IGBT modules will require larger gate resistors.
• Generally, the value of an optimised gate resistor will be somewhere between the value indicated in the IGBT data sheet and roughly twice this value. This is applicable for most applications. The gate resistor value specified in the IGBT data sheet is the minimum value; twice the rated nominal current can be safely switched off under the conditions specified. In practice, the gate resistor value in the IGBT data sheet cannot always be achieved due to differences between the test circuitry and the individual application parameters. The rough value mentioned (i.e. twice the data sheet value) may be taken as a starting point for optimisation, i.e. to reduce the gate resistor value. The only way to ascertain the final optimised value is to test and measure the final system.
•  In most applications, the turn-on gate resistor RG(on) is smaller than the turn-off gate resistor RG(off). Depending on the individual parameters, RG(off) can be roughly twice the RG(on) value.
• It is important to minimize parasitic inductance in applications, especially in the DC-link circuit. This is necessary to keep the turn-off overvoltage at the IGBT within the limits specified in the IGBT data sheet, particularly in short-circuit conditions. A simple way of reducing the overvoltage in short-circuit conditions is to use a soft turn-off circuit, for example. In the event of a short-circuit, the soft turn-off circuit increases the resistance in series with RG(off) and turns off the IGBT more slowly.

Please note: The selected gate resistor should be validated by the user’s technical experts for each application.

### Minimum Gate Resistance – Maximum Gate Peak Current

The gate resistance determines the gate peak current IGM. Increasing the gate peak current will reduce the turnon and turn-off time as well as the switching losses. The maximum value for the gate peak current and the minimum value for the gate resistor, respectively, are determined by the performance of the driver output stage. In the data sheet of a driver a maximum peak current is given, as is the minimum value for the gate
resistor. These values have to be considered to avoid driver damage. In practice, the gate current might be somewhat smaller due to the IGBT module's internal resistor RG(int) and inductances in the gate control path. The RG(int) value is indicated in the IGBT data sheet.

The gate peak current can be calculated as follows:

Calculation for minimum gate resistance:

### Power Dissipation

If large IGBT modules are used at high frequency, substantial losses can occur in the gate resistors of the gate drive circuit. This power dissipation can be estimated using the following derivation.

Estimation of Power Losses in Gate Resistor

Effective value of turn-on gate current, e.g. by triangle pulse shape derivation:

$I_{G(on)RMS} = I_{G(on)PEAK} \sqrt{\frac{k}{3}}$
$k = \frac{t_p}{T} = t_p \times f_{sw}$

Calculation of power dissipation in the turn-on gate resistor:

$P_{G(on)} = I_{G(on)RMS}^2 \times R_{G(on)}$

Effective value of turn off gate current

$I_{G(off)RMS}= I_{G(off)PEAK} \sqrt{\frac{k}{3}}$

Calculation of Power Dissipation in the turn off gate resistor:

$P_{G(off)} = I_{G(off)RMS}^2 \times R_{G(off)}$

Please note: These equations can be used for a gate resistor that is divided up into two resistors RG(on) and RG(off) for turn-on and turn-off. A saftey margin must be considered when selecting a gate resitor on the basis of the calculated power dissipation.

### Peak Power Capability

During operation, the gate resistor has to withstand a continuous flow of pulses. Therefore, the gate resistor has to have a certain peak power capability. One possible way of determining this capability is to calculate the pulse load power and use the diagram for continuous pulse loads shown in the data sheet of a resistor.

The pulse load can be calculated as follows:

### Resistor Type

The gate resistor must meet certain performance requirements and have certain features in order to be able to withstand the substantial load that occurs in application. The following table shows the main features of a gate resistor and an example of a suitable resistor.

### Design and Layout

Due to the substantial load on the gate resistors, the use of resistors in parallel is advisable. This would produce a redundancy, enabling temporary operation with higher switching losses should one gate resistor be damaged. The performance of each paralleled resistor in relation to power dissipation and peak power capability must be designed for maximum gate current in application. Using gate resistors in parallel also helps improve thermal spreading.

The layout with gate resistors in parallel must be such that excessive heat produced by the gate resistors does not overheat components mounted nearby. Sufficient large cooling areas for the gate resistors must be given due consideration in the layout. Suitable heat sinks on the printed circuited board can be used to bring about better cooling. An example layout with cooling areas for parallel gate resistors (red and green areas) is shown below.

The distance between the gate resistor circuit and the IGBT module should be kept as short as possible. Long distances lead to higher  inductance in the gate-emitter path. Combined with the input capacitance of the IGBT, this wiring inductance forms an LC circuit. This circuit might create oscillation, which can be higher than the maximum permissible gate voltage. This oscillation can be damped by using a gate resistor which is larger than the minimum gate resistor, calculated as follows.

Troubleshooting

The following table describes possible problems and their effects with regard to gate resistors. It should assist in pinpointing possible causes and effects.

 Problem Effect and Action Increased switching losses The selected gate resistor value is too high, causing excessive losses. The gate resistor should be reduced, bearing in mind the switching performance of the whole application. Excessive voltage spike at IGBT Inductance in the application (DC-link) is too high or a small turn-off gate resistor is used, leading to a higher di/dt. The inductance should be minimized or the turn-off gate resistor increased. To reduce voltage spike in the event of a short-circuit, a soft turn-off circuit may be used. Overheated / burned gate resistor The power dissipation as well as peak power capability of the resistor is not sufficient. A non-surge-proof resistor is in use. EMI noises Very small gate resistors are used, leading to higher dv/dt or di/dt values. As a result, more EMI is produced. Too high a gate resistance value causes the IGBT to operate for a long time in linear mode during switching and finally results in gate oscillation. Oscillation at the gate Wiring between gate resistor and IGBT module is too long. This leads to higher inductance in the gate-emitter path and forms - with the input capacitance of the IGBT - a resonant circuit. The oscillation can be damped by shorter wiring. The main current is coupled inductive into the control circuit. Avoid parallel gate wires to main terminals. Use twisted wires.

Symbols and Terms Used

 Symbol Term Cies Input capacitance IGBT diC/dt Rate of rise and fall of collector current dvCE/dt Rate of rise and fall of collector-emitter voltage Eoff Energy dissipation during turn-off time Eon Energy dissipation during turn-on time fsw Switching frequency IC Collector current IG Gate current IGM Peak gate current IGRMS Effective value of gate current Irr Reverse recovery current IRRM Peak reverse recovery current Lσ Stray inductance Lwire Inductance of wiring PG Power dissipation in gate resistor PPULSE Pulse load RG Gate resistor RG(int) IGBT module internal gate resistor RG(min) Minimum gate resistor RG(off) Turn-off gate resistor RG(on) Turn-on gate resistor t Time tsw Switching time T Time period tp Pulse duration VCE Collector-emitter voltage VG Gate voltage (output driver) VG(off) Turn-off gate voltage (output driver) VG(on) Turn-on gate voltage (output driver) Vstray Voltage spike caused by stray inductance and di/dt

References

http://www.SEMIKRON.com

Application Manual Power Modules, SEMIKRON International

M. Hermwille, "Plug and Play IGBT Driver Cores for Converters", Power Electronics Europe Issue 2, pp.10-12, 2006

P. Bhosale, M. Hermwille, "Connection of Gate Drivers to IGBT and Controller", Application Note AN-7002, SEMIKRON

Criteria for Successful Selection of IGBT and MOSFET Modules

Four Types of Switching Processes

Power Electronic Switches: Neutral Switches

Power Electronic Switches: Zero Voltage Switching and Zero Voltage Resonant Switches

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