Posted on 01 September 2019

Interleaving Enhances Power Factor Corrector Performance

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Interleaving reduces dramatically the ripple current amplitude

To limit the input current harmonics drawn by the off-line equipment, several international regulations, such as the EN62019-3-2 are in place. In order to limit the harmonic currents, power factor correction (PFC) circuits are used.

By Marcus Zimnik, Texas Instruments


The need for power factor correction (PFC)

Most electronic equipment is supplied by 50/60 Hz utility power, and more than 50% of the power is processed through some kind of power converters. Usually, most of the power conversion equipment employs a diode rectifier with a bulk capacitor to convert AC to DC voltage before processing it. Such rectifiers produce input current distortion and current harmonics, which pollute the power system.

To limit the input current harmonics drawn by the off-line equipment, several international regulations, such as the EN62019-3-2 are in place.

Another reason to limit harmonic currents is the ability to use the full rated current from the available power source. For example, if you have a typical 16A service (single phase 230V) and your rectifier is 98% efficient with 55% power factor the maximum load you can draw is 1984W. This assumes using 100% of the rated breaker current, which is unlikely. If the power factor improved to 99% the load increases to 3570W, an increase of almost 80%.

In order to limit the harmonic currents, power factor correction (PFC) circuits are used.

The Boost Converter

Most PFC circuits for higher output powers are based on the boost converter (Figure 1). The reasons for using the boost converter are the simplicity in circuit and system design, reduced voltage stress on devices, and high conversion efficiency compared to the other topologies. Further, the step-up conversion makes it suitable for universal input voltage application (90 to 264 V).

PFC based on boost converter

The boost converter can operate in two modes, continuous conduction mode (CCM) and discontinuous conduction mode (DCM). PFC boost converters operating in CCM have better utilization of power devices, lower conduction loss, and lower input current ripple. On the other hand, boost converters in DCM have lower boost-rectifier reverse-recovery loss and lower transistor switching-on loss.

Qualitatively the CRM boost has an advantage in losses for low to medium power applications, while the filtering requirement is not so severe as to be a big disadvantage.

The CCM boost is a better choice for medium to high power applications. The peak currents are significantly lower which reduces conduction losses while the lower ripple current reduces filter requirements.

PFC based on Interleaved Boost Converters (IBC)

As the power rating increases, it is often required to associate converters in series or in parallel. This is mainly due to the lack of a single device that can withstand the voltage and/or current stresses of high power applications. For high power applications, the interleaved boost converter is preferable (Figure 2).

PFC based on a Two cell interleaved boost converter

It consists of a phase shifting of the control signals of several cells in parallel operating at the same switching frequency. As a consequence of the interleaving operation, the aggregated input current and output voltage waveforms exhibit lower ripple amplitude and smaller harmonic contents than a single boost converter. The cancellation of low-frequency harmonics allows, eventually, the reduction of size and losses of the filtering stages. In addition, switching and conduction losses through the switches are just a fraction of the input current and as a consequence EMI levels decrease significantly. Figure 3 shows the inductor current waveforms of a two cell interleaved boost converter.

Inductor current waveforms of a two cell interleaved boost converter at different duty-cycles

Figure 3a shows operation at 50% dutycycle which results in a complete cancellation of input ripple current and Figure 3b shows operation at 30% duty-cycle. Here the aggregated input ripple current is twice the individual cell switching frequency.

Trade-offs offered by interleaving PFC converters

There are many benefits for using the interleaving technique in PFC systems. First, interleaving two boost cells with 180° phase shift cancels the weaker odd harmonics while doubling the evens. Therefore, for the same net ripple amplitude and EMI specification, the parameter values of the input EMI filter can be made smaller by a factor of 2. On the other hand, for a fixed input ripple frequency f, the switching frequency of the individual boost cell can be reduced to f/2, which may lead to substantial reduction of switching losses. Second, by splitting the total power into 2 paralleled boost cells, each boost cell input/output current is reduced by 1/2. Correspondingly, the ripple current is reduced by 1/2. On the other hand, if we keep the same current ripple amplitude, the inductance in each boost cell can be reduced by 1/2. This could reduce the converter size. For example, it becomes possible to reduce the switching frequency by a factor of 2 (to increase conversion efficiency) and to reduce the inductance per boost cell by a factor of 2 (to reduce converter size). The resulting system will have a per-cell ripple 22 times larger than a single boost converter, but the net interleaved ripple will remain unchanged. In this manner, interleaving can be used to increase conversion efficiency and power conversion density as well as to reduce ripple amplitude. Third, interleaving can be used to dramatically reduce the ripple current amplitude at the boost converter input and output. Figure 4 shows the input current ripple of a single and dual-phase interleaved boost converter [9]. Figure 5 shows the relative output voltage ripple of a single and dual-phase interleaved boost converter [9].

Input current ripple of a single and a dual phase interleaved boost converter

The main challenge found when implementing an interleaved PFC converter are current unbalances resulting from intrinsic device parameters variations and differences, which is specially critical when operating in CCM and the increased circuitry complexity when compared with a conventional boost converter.

Relative output voltage ripple of a single and dual-phase interleaved boost converter

EVM available featuring interleaved PFC

Texas Instruments has developed an evaluation module (EVM) that allows engineers to explore the benefits of an interleaved PFC converter. The circuit diagram is depicted in Figures 6 and 7, respectively. The control circuitry uses a State-of-the-Art UCC28528 PFC/PWM combination controller to shape the input current wave to provide power factor correction. This device also controls a 2- W auxiliary bias supply that can be used to control external circuitry. The UCC28528 features an improved multiplier and the use of a transconductance amplifier for enhanced transient response. The UCC28528 has a highly linearized multiplier circuit capable of producing a low distortion reference for the line current over the full range of line and load conditions. The output voltage error is processed through a transconductance voltage amplifier. The transient response of the circuit is enhanced by allowing a much faster charge/discharge of the voltage amplifier output capacitance when the output voltage falls outside a certain regulation window. A number of additional features such as under voltage lock out (UVLO) circuit with selectable hysteresis levels, an accurate reference voltage for the voltage amplifier, zero power detect, over voltage protection (OVP)/enable, peak current limit and power limiting characterize the PFC section of the device.

Auxiliary Supply and PFC Control Circuitry

The UCC28220 interleaved PWM provides OVP protection and current sharing between the two interleaved boost converters. The UCC28220 is a BiCMOS interleaved dual channel PWM controller. Peak current mode control is used to ensure current sharing between the two channels. Additional features include a programmable internal slope compensation with a special circuit which is used to ensure exactly the same slope is added to each channel.

PFC Pre-Regulator Power Stage

Figure 8 shows the individual inductor current waveforms and the aggregated input current of the EVM.

Input Current and Inductor Currents

More waveforms and information is available in the EVMs user’s guide

The interleaved PFC regulator is an interesting alternative and choice for high current applications. Interleaving permits a significant reduction in the magnetic energy storage inductors and the differential-mode EMI filter. Interleaving can also significantly reduce the switching losses. The main advantage of interleaving is that it effectively increases the switching frequency without increasing the switching losses. The obvious benefit is an increase in the power density without the penalty of reduced power-conversion efficiency. An EVM board available from Texas Instruments allows engineers to explore the benefits of an interleaved PFC regulator.



1) L. H. Dixon, “High Power Factor Preregulators for Off-Line Power Supplies”, Unitrode Power Supply Design Seminar Manual SEM600, 1988.
2) L. H. Dixon, “Optimizing the Design of High Power Factor Switching Preregulator”, Unitrode Power Supply Design Seminar Manual SEM700, 1990.
3) J. P. Noon, “Designing High-Power Factor Off-Line Power Supplies”, Texas Instruments-Unitrode Power Supply Design Seminar Manual SEM1500, 2002.
4) L. Balogh, and R. Redl, “Power-Factor Correction with Interleaved Boost Converters in Continuous-Inductor-Current Mode,” APEC Conf. Proc., 1993, pp. 168-174.
5) José R. Pinheiro, Hilton A. Gründling, Dalton L. R.Vidor and José E. Baggio, “Control Strategy of an Interleaved Boost Power Factor Correction Converter”, PESC’99, Vol.1, pp. 137-142.
6) B. A. Miwa, D. M. Otten and M. F. Schlecht, “High efficiency power factor correction using interleaving techniques,” Proceedings of APEC’92, pp. 557-568, 1992.
7) H. A. C. Braga and J. Barbi, ”A unity Power Factor Rectifier Based on a two cell Boost Converter Using a New Parallel-Connection Technique”, PESC’96, pp. 1620-1626, 1996.
8) Giral, R., Martinez-Salamero, L., Leyva, R. and Maxie, J, “Sliding-mode control of interleaved boost converters”, IEEE Trans. Circuits and Syst. I Fundam Theory Appl., 2000, 47, (9), pp. 1330–1339.
9) H. B. Shin, J. G. Park, S. D. Chang and H. C. Choi, “Generalized analysis of multiphase interleaved boost converter”, International Journal of Electronics, Vol. 92, No. 1, January 2005, pp. 1-20.
10) C. Chang and M.A. Knights, ‘‘Interleaving technique in distributed power conversion systems’’, IEEE Transactions on Circuits and Systems—I: Fundamental Theory and Applications, 42, pp. 245–251.
11) Texas Instruments Datasheet “UCC28528”, TI literature number SLUS608D,
12) Texas Instruments Datasheet “UCC28220”, TI literature number SLUS544A,
13) Texas Instruments EVM User’s Guide “HPA117 350-W Interleaved PFC Pre-Regulator”, TI literature number SLUU228,



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One Response

  1. avatar Vidyadhar Gouda says:

    Its wonderful writing on basic information on Interleaved PFC which I found useful so for in the web.
    Thanks a lot.

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