Modeling of Power Semiconductor Devices

 

The importance modeling of nonstationary thermal processes and computing overload currents of power semiconductor devices (PSDs) depends on the complexity of experimental measurement of temperature fields in PSD structures as well as overload current values at which PSDs fail.

In most cases, PSD failures under the exposure of current pulses are connected with the overheating of the whole Si-structure, or some part of it. Most authors note that the main type of failure is Si-wafer failure, which occurs as a result of current filament generation or fusion of solders ^[1-8].

There is a difference between surge current and critical overload current. Surge current is usually considered to be the peak pulse amplitude of a sine-shaped forward current with a duration of 10 ms, which passes through PSDs without the subsequent voltage applied, and the definite classification parameters of the latter are within limits. The term "critical overload current" is usually used under other mode conditions, for example, when the width of pulses and their waveform change upon forward or reverse voltage application after the current pulses take effect.

Model for the Si-structure temperature computation

The temperature computation of PSD structures is required for the definition of values of surge current and critical overload current. This temperature is determined by solving the heat conduction equation.

In solving of the heat conduction equation, the following assumptions can be made.

1.  The heat flows are univariate and directed lengthwise on the device axis.

   For diodes, this assumption is usually true for current pulses of any duration. In the case of thyristors, as their turn-on time throughout all the area is usually less than 1 ms ^[3], it works precisely for pulses with duration more than 1 ms. It can, however, be used for shorter pulses, as the energy exertion during their turn-on is much less than the energy dissipated in a PSD in its on-state.

2.  A PSD can be represented as a multilayer model consisting of a sequence of homogeneous layers (Figure 1).

   

   Figure 1. Multilayer model of PSD by the example of a thyristor Т243-500 of pressed design. The thickness of layers is indicated in millimeters. The thickness of contact layers may be optional; their thermal parameters are determined experimentally, by the thermal resistance of the device [see formulas (1) - (4)]

3.  Heat release only takes place in a Si-wafer. The ohmic resistance of metals can be neglected.
4.  In sealing areas, the thermal contact is perfect, i.e. it has no thermal capacity and thermal resistance.

   The influence of pressure contacts can be taken into consideration by means of thermal contact resistances r_thx, whose values are calculated by taking the full thermal resistance R_th of the device into account which in turn is measured by testing.

   For example, for the PSD model shown in Figure 1, the thermal contact resistance is:

   $$\begin{equation} r_{thx}=R_{th}-0.5\Big [R_{th1}+R_{th2}-\sqrt{4R_{th}^2+(R_{th1}-R_{th2})}\Big ] ,\end{equation}$$

   where

   $$R_{th1}\equiv r_{th1} +r_{th3}+r_{th4}+r_{th5}/2$$

   $$\begin{equation} R_{th2}\equiv r_{th5}/2+r_{th6}+r_{th7}+r_{th9}\end{equation}$$

   and r_th with the indices 1,3,4 and etc. refer to the thermal resistances of respective layers (Cu, Ag, and W layers etc.), which can be calculated using the formula:

   $$\begin{equation} r_{th}=\frac{1}{\lambda S}\end{equation}$$

5.  Initial temperature of all structural elements is equal to environment temperature Т₀ and the temperature of free edge boundaries of the PSD is constant and equal to the same environment temperature Т₀.
6.  The specific heat capacity с and density r of all materials, as well as the thermal conductivity coefficient l of metals do not depend on temperature.

   The heat conductivity of the contact layers l_x is also constant and is determined by the thermal contact resistance r_thx:

   $$\begin{equation} \lambda _x=\frac{l_x}{r_{thx}S_x}\; ,\end{equation}$$

   where l_x  depicts thickness, and S_x  is the surface area of the contact layer.

   The temperature dependence of Si heat conduction is given by the expressions ^{[1, 2, 11]}:

   $$\begin{equation} \lambda _{Si}=\frac{280}{T-100} \; \; \Big (\frac{W}{cm\cdot K} \Big )\; ,\end{equation}$$

   where Т  is  absolute Si-temperature.

The values l_x and S_x in the formula (4) can be selected arbitrarily, as they have no influence on the thermal contact resistance r_thx, and consequently, on the complete thermal resistance of the device. However, the most realistic value for S_x is equal to the minimum area of the surface layer directly adjacent to a contact layer.

The formula (5) coincides well with experimental data (experimental error no more than 5 %) within the temperature range of 300 - 1300 K ^[11].

Subject to the assumptions made, the heat conduction equation which describes time evolution of temperature fields in PSD structures have the following appearance:

$$\begin{equation} \frac{\partial T}{\partial t}=\frac{\partial}{\partial x}\Big (k\frac{\partial T}{\partial x}\Big )+Q\; \; ,\end{equation}$$

where Q is the heat source density and k is the thermal diffusivity that can be calculated using the following expression:

$$\begin{equation} k=\frac{\lambda }{c\rho }\end{equation}$$

The equation (6) can be solved separately ^[1-3] for each layer with the subsequent joining of the solutions obtained and thermal flows at the layer's boundaries. However, from the point of view of the labor intensivness of solving algorithms, compiling, and saving time, it is practical to consider values k and Q in this equation as piecewise continuous functions of the coordinate x, which describes the position of the sighting point on the device axis, and to search for the solution at once all over the area 0≤x≤L, where L is the total thickness of the layers of the multilayer PSD model (the thickness of the device).

In this case:

$$\begin{equation} k\equiv k(x,T)=\begin{cases} \frac{\lambda _1}{c_1\rho _1} & \text{if } 0\leq x\text{<}l_1\\ \frac{\lambda _2}{c_2\rho _2} & \text{if } l_1\leq x\text{<}l_2\\ \frac{\lambda _3}{c_3\rho _3} & \text{if } l_1+l_2\leq x\text{<} l_3\\ \frac{\lambda _{Si}}{c_{Si}\rho _{Si}} & \text{for Si-layer} \end{cases} \end{equation}$$

(the indices 1, 2, 3 etc. correspond to a number of a layer under consideration), and Q ≡ Q(x, T, t) is nonzero only for those values of x which match the Si-layer:

$$\begin{equation} Q\equiv Q(x,T,t)=\begin{cases} O & \text{for all layers except Si}\\ Q(T,t) & \text{for Si-layer} \end{cases} \end{equation}$$

From this point onwards, assume the heat release takes place evenly throughout all the thickness l_Si of the Si-structure ^[1]. Then the density of heat sources  in Si, which is proportional to the product of the current strength I₀ ≡I(t) flowing through the PSD, and the voltage U ≡ U(t) on the device, will be given by the following equation.

$$\begin{equation} Q(T,t)\approx \frac{1}{S_{Si}l_{Si}}IU\; \; ,\end{equation}$$

where S_Si  is the surface area of the Si-structure .

Thus, the relation between I and U  is determined by the I-V- curve of the device, which in turn shows temperature dependence.

At their direct inclusion, the isotherm I-V curves of production run PSDs can be described with a high degree of accuracy ^[14] by the expression:

$$\begin{equation} V=A+BI+C\cdot ln(I+1)\end{equation}$$

The temperature dependence of factors A, B and C in this expression is described by the following formulas ^[14]: 

$$\begin{equation} A(T)=A_0[1-\alpha (T-T_0)]\; ,\end{equation}$$

$$\begin{equation} B(T)=B_0[1+\beta (T-T_0)]\; ,\end{equation}$$

$$\begin{equation} C(T)=C_0\frac{T}{T_0}\; ,\end{equation}$$

Where A₀ ≡ A(T₀), B₀ ≡ B(T₀), C₀ ≡ C(T₀), α, and β are constants, whose values are determined by performing tests.

At reverse inclusion of PSDs, their isotherm I-V curves can be derived using the equation below^[14]:

$$\begin{equation} I\approx \frac{VI_0\cdot exp\Big (-\frac{T_g(T_0-T)}{T_0T}\Big )}{I_0B_0\cdot [1+\beta \cdot (T-T_0)]\cdot exp\Big (-\frac{T_g(T_0-T)}{T_oT}\Big )+V}\; ,\end{equation}$$

where T₀ and Tg are also constants determined through testing.

Note, that the value A in expression (11) is in the pinch-off voltage ^[14], B is the differential resistance of the device, and C≈ckt/e , where k is the Boltzmann constant, e is the elementary charge, and c is the proportionality factor depending on the quantity and manufacturing process features of p-n junctions.

In the expression (15), the value refers to a back current which flows through the device at the temperature of T₀, and Tg is the half-width of the semiconductor forbidden band evaluated in absolute degrees.
The formula (15) corresponds to the back current saturation region. In computing heat source density (10) in Si, its use is justified by the fact that the processes of PSD changeover run fast ^[3], at a period less than 0.1 ms, which is lower than the pulse duration used in practice. Besides, the power which is released at PSD changeover becomes negligible in comparison with the power expelled in the Si-structure at the time of PSD activity in the saturation region.

Thus, the heat sources density (10) in Si is determined by following expressions:

а) at the direct PSD inclusion

$$\begin{equation} Q(T,t)\approx \frac{1}{S_{Si}l_{Si}}\Big [A(T)+B(T)I(T)+C(T)ln\Big (I(T)+1\Big )\Big ]\; \end{equation}$$

where the temperature dependence of factors A, B, and C is described by formulas (12) - (14);

b) at the reverse PSD inclusion

$$\begin{equation} Q(T,t)\approx \frac{1}{S_{Si}l_{Si}}\cdot \frac{V^2(t)I_0\cdot exp\Big (-\frac{T_g(T_0-T)}{T_0T}\Big )}{I_0B_0\cdot [1+\beta \cdot (T-T_0)]\cdot exp\Big (-\frac{T_g(T_0-T)}{T_oT}\Big )+V}\; .\end{equation}$$

In formulas (16) and (17), the surface areas of the Si-structure S_Si is speсified by PSD geometry and is a constant at reverse inclusion of a device and also at direct inclusion of a diode. At direct inclusion of a thyristor, S_Si changes in the course of time, as the process of a thyristor turn-on passes with the terminal velocity v₀ ≈ 10 cm/ms [3,4,8]. The foregoing condition may be taken into account, in a thyristor case, by replacement of the constant S_Si in the formula (16) with the value:

$$\begin{equation} S(t)=\begin{cases} \pi \Bigg(\sqrt{\frac{S_0}{\pi }} +v_0t\Bigg )^2 & \text{if }S(t)\text{<}S_{Si} \\ S_{Si} & \text{if} S(t)\geq S_{Si}\; ,\end{cases} \end{equation}$$

where S₀ is the initial area of a thyristor turn-on (near control electrode), whose width usually amounts to 0.3 - 0.6 mm [3]. Thus, the value B(T) in formula (16), which refers to thyristor differential resistance, should be exchanged by the value B(T)×S_Si /S(t). The heat conduction equation (6) should be solved with the specified initial and boundary conditions. In compliance with the starting assumption 5, the initial condition for an unknown function T(x,t) is given by:

$$\begin{equation} T(x,0)=T_0\end{equation}$$

Thus, boundary conditions for this function in the region 0 ≤ x ≤ L are determined by the following equalities:

$$\begin{equation} T(0,t)=T(L,t)=T_0\end{equation}$$

Permissible overload current computation

When applying a surge current pulse or a critical overload current, either catastrophic (unconditional) device failure (namely fusion penetration, silicon wafer cracking, etc.) or conditional failure as a consequence of temporary overrun of permissible values of one or several PSD parameters due to permissible temperature excess may take place. Thus, the approach to computation of permissible overload currents consists of a critical temperature T_с definition (theoretical or experimental) of some area of the device, when its failure (conditional or unconditional) takes place, and the search, on the basis of the model described in the previous section, for the current value which is capable of heating the indicated area to such a temperature.

For the majority of PSDs, it appears that the difference between the current by which a conditional failure of the device ensues and the destruction current is less than 10 % ^[1]. The current used in this case is the one which results in unconditional failure of the device.

Subject to PSD design features, the shape and duration of a current pulse,  the initial temperature of the device, and time between the overload current pulse termination and the direct or reverse voltage application, the factors which result in unconditional failure of the device may be  Si-wafer fusion (T_с » 1683 К), fusion of Cu (T_с » 1340 К), or fusion of Ag (T_с » 1270 К) spacers. However, most experts designate the fusion (T_с » 870 К) of aluminium-silicon (silumin) alloy generated by a silicon wafer metallization and destruction of Si-structure due to current filament formation as the dominant cause which results in PSD destruction^[1-8].

The Si-structure destruction, connected with the thermal filament formation, is explained by temperature increase in the thyristor or the diode base zone. The carrier density n_i(Т) increases, which, in the most heated area of structure (approximately in the base zone center), becomes comparable with the injected charge carriers density n ^{[1, 8]}. The resistance of this area decreases and the current rises, resulting in fusion penetration of the device in the narrow area, with a diameter of 0.2-0.5 mm.

For the stringent analysis of thermal pinching, it is necessary to solve a multi-dimensional problem and consider the influence of extreme areas and redistribution of current and voltage of the structure in the pinching process. However, studies show that in the one-dimensional approximation, it is possible to use a simplified thermal breakdown criterion which has the following appearance:

$$\begin{equation} n_i=(5kT/E_g)\bar{n} \; ,\end{equation}$$

where n = n + n_i is the average charge carriers density in the base, and E_g is the energy gap width of a semiconductor ^[15].

Experimental investigations make this criterion more precise ^[7]:

$$\begin{equation} n_i\approx 0.2\bar{n}\end{equation}$$

Since the current basically is of a drifty nature, one obtains

$$\begin{equation} \bar{n} \approx \frac{j(l_n+\Delta )}{e\mu (T)U_B}\; ,\end{equation}$$

where j is the density of current flowing through the base, i_n is the base thickness, Δ ≈ 50 - 100 microns, μ (T) = μ_n(T) + μ_p(T) is the total carriers mobility in the base, and U_B is the voltage drop in high resistance internal layers of the structure.

Assuming that V_B = B₀ [1 + β (T - T₀)] j S_c, l _n ≈ l _Si, we have

$$\begin{equation} \bar{n} \approx \frac{l_{Si}+\Delta }{eB_0S_C\mu (T)[1+\beta(T-T_0)]}; ,\end{equation}$$

where S_c is the cathode area, and the constants B_o and β have the same sense as in (13).

Despite their approximate nature, expressions (22) and (24) determine the critical temperature T_c of a current ^[1] pinching with satisfactory accuracy. This temperature is determined by the numerical solution of the equation:

$$\begin{equation} n_i(T_c)\approx \frac{l_{Si}+\Delta }{5eB_0S_C\mu (T_c)[1+\beta(T_c-T_0)]}\; ,\end{equation}$$

by substitution with the dependences μ(T) and n_i(Т) and the temperature-independent parameters of the structure. Thus for μ(T) and n_i(Т), it is proper to select the following semi-empirical dependences ^{[1, 8]}:

$$\begin{equation} \mu (T)\approx \mu _0\Big (\frac{300}{T}\Big)^{5/2}\; ,\end{equation}$$

where μ₀ ≈ 1350 cm²/(V.s) ^[8];

$$\begin{equation} n_i(T)\approx n_0T^{3/2}exp\Big (-\frac{T_g}{T}\Big )\; ,\end{equation}$$

where n₀ ≈ 3.88.10¹⁶ 1/(cm³. К^3/2) ^[16], and T_g has the same meaning as in (15).

In connection with the abrupt exponential dependence of n_i(Т), the temperature Tс, defined already at the solution of the equation (25), depends on concentration, approximately following a logarithmic law. Therefore, any error in the concentration definition does not result in a temperature error of more than 20-30 °С. That justifies the use of conditions (22) and (24).

Such is the algorithm of permissible overload current computation. Critical temperature Tс is determined using Equation 25, which is assumed to take place in the most heated area of the device - approximately in the middle of the base zone. Further, making use of the temperature computation model described in section 2, we determine a current capable of heating the PSD to the temperature Tс. If the temperature of other areas of the device (silicon wafer, Cu- and/or Ag-spacers, silumin) appears below the fusion point, we may take the calculated value of a current as the maximum permissible one. Otherwise, we suppose the critical temperature to be equal to the fusion temperature of the PSD area, where this value has the minimum, and then we repeat the permissible overload current computation procedure.

As a result of software implementation of this algorithm it becomes possible to determine:  

1. The permissible overload current value under different operating modes of the PSD;
2. The mechanism of probable destruction of the PSD at the permissible overload current value override;
3. The time evolution of temperature field distributions in the PSD structures at passing of permissible overload current through it.

Results of numerical modeling of thermal processes passing through a thyristor and a diode during operation

Input parameters of numerical models of the given PSDs are:

1. Geometric properties (thickness l and cross section area S) of layers forming a multilayer structure of the device (see Figure 1);
2. Density ρ and thermal characteristics (heat conductivity λ and specific heat capacity c) of the materials these layers are made of;
3. Initial temperature T₀ of the PSD;
4. Measured total value of thermal resistance R_th of the device;
5. Experimentally determined parameters of the I-V curve of the device (factors A, B and C, which describe a straight-line branch (11) of the E-I curve, and value I_s of the reverse saturation current) for two different temperatures Т₁ and Т₂;
6. Number N of the forward current sine pulses (it is supposed that these pulses follow one after the other at regular intervals, equal to their duration);
7. Pulse duration;
8. Amplitude of sinusoidal pulse of the reverse voltage (of the same duration) which is applied right after the forward current pulse;
9. Area S₀ of initial area of the device turn-on (for a thyristor);
10. Probable value of permissible overload current.

The value of the last parameter may be selected at will. It is necessary only because at permissible overload current calculation, the interpolation methods are used ^{[12, 13]}, and they demand some initial "seed" value of the sought quantity. Only the running time, not the final result, depends on the accuracy of this value assignment.

To calculate the temperature of the PSD multilayer structure, the model described in section 2 is used. Thus constants A₀, B₀, C₀, α and β, which are parts of formulas (12) - (14), and also I₀ and T_g in formulas (15) and (17), are calculated on the basis of experimentally defined parameters of the I-V curve which correspond to two different (moderate) values of temperature Т₁ and Т₂:

$$\begin{equation} \alpha =\frac{A_1-A_2}{A_1(T_2-T_1)}\end{equation}$$

$$\begin{equation} A_0=A_1\cdot [1-\alpha \cdot (T_0-T_1)]=A_1-\frac{(A_1-A_2)(T_0-T_1)}{T_2-T_1}\end{equation}$$

$$\begin{equation} \beta =\frac{B_2-B_1}{B_1(T_2-T_1)}\end{equation}$$

$$\begin{equation} B_0=B_1\cdot [1+\beta \cdot (T_0-T_1)]=B_1+\frac{(B_2-B_1)(T_0-T_1)}{T_2-T_1}\end{equation}$$

$$\begin{equation} C_0=\Big (\frac{C_1}{T_1}+\frac{C_2}{T_2}\Big )\frac{T_0}{2}\end{equation}$$

$$\begin{equation} T_g\approx \frac{T_1T_2}{T_2-T_1}ln\Big (\frac{I_{S2}}{I_{S1}}\Big )\end{equation}$$

$$\begin{equation} I_0\approx I_{S1}exp\Bigg (-\frac{T_g(T_1-T_0)}{T_1T_0}\Bigg )\approx I_{S1}exp\Bigg (\frac{T_1-T_0}{T_2-T_1}\cdot \frac{T_2}{T_0}\cdot ln\Big (\frac{I_{S1}}{I_{S2}}\Big )\Bigg ) \end{equation}$$

Output parameters of the numerical model are:

1. Permissible overload current value;
2. Time evolution of temperature field distributions in PSD structures at passing of permissible overload current through it.; 3) distribution of temperature in PSD structures, in conformity with the device destruction.

Conclusion

Using results of the numerical modeling of thermal processes carried out by passing a current pulse through a thyristor and a diode,  it is possible to make the following conclusions:

1. Critical temperatures of destruction for the majority of PSDs lies in the range 400 - 600 °С. Thus the main cause of destruction of devices is the silicon structure overheating as the consequence of current pitching or silumin fusion, generated by metallization of Si-structure.
2. Heating rate of a PSD at passing of direct or reverse current pulses appears less than the rate of a current change, that results in the time displacement of the temperature maximum comparatively with the current maximum.

Thus, by passing of a current pulse the device destruction occurs mostly during the last moments of current pulse passing through. This can be explained by:

1. The diffusive nature of heat transfer processes in PSD structures, which have their own rates determined by design faсtors of the device;
2. Temperature dependence of PSD I-V curve, in particular, by temperature dependence of differential resistance of the device (13), which results (11) in voltage increase on the device at its heating at the moment of forward current pulse passing, and the increase in connection with the reverse current temperature rise (15) at application of a reverse voltage pulse to the device; 3) temperature dependence (5) of Si heat conductivity
   Mentioned conditions should lead to increase in value of permissible overload currents if the pulse duration is decreased.
3. Surge currents values of devices appear higher than the values of critical overload currents. At the same time increase in number of pulses results in decrease of permissible overload currents.
   It may be explained by the fact that between adjacent pulses, devices have no time to cool down to the initial temperature. Lowering of the initial temperature of devices, as well as their forced cooling during activity should result in increase of values of permissible overload currents.

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For more information, please read:

Approaches to Mounting Power Semiconductor Devices

Device Failure due to Electrical and Thermal Conditions

Power Electronics Design, Simulation, and Analysis Tools