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Posted on 03 June 2019

Overvoltage Limitation for Power Transistors

DC link voltage with optimised dynamic feedback

 

 

 

 

 

 

 

 

 

 

Overvoltage limitation between main terminals

Measures to limit overvoltages between main terminals (collector-emitter voltage, DC link voltage) can be divided into passive snubber networks, active clamping, and dynamic gate control. Irrespective of the type of overvoltage limitation, the avalanche operation mode of a MOSFET can be utilized, if applicable. The limiting values given in the datasheets must be strictly adhered to. In addition, the suitability of avalanche operation for the intended application should be confirmed by the manufacturer.

Passive snubber networks

Passive networks (snubbers) are combinations of passive elements such as R, L, C, suppressor diodes, diodes, varistors, etc. Figure 1 shows basic and frequently used circuits.

Passive overvoltage limitation networks (snubbers)

Figure 1. Passive overvoltage limitation networks (snubbers)

Passive snubber networks prevent dangerous overvoltages from being induced by the inductances of the commutation circuit LK by attaching a capacitor which absorbs the energy stored in LK (E = LK /2·i²). To ensure that the circuit continues to work effectively, the absorbed energy has to be discharged again between two charging processes. With simple snubbers, this task is performed by heat conversion in the snubber resistors or by feedback to the DC link capacitor.

The simplest method is to clamp the DC link voltage directly to the power module terminals by means of a capacitor (such as a film capacitor). This measure is sufficient for many VSI applications. In this case, the capacitance value lies in the region of 0.1...2 μF (Figure 1a).

The following parameters must be considered when dimensioning the capacitor:

  • DC voltage class of the capacitor (e.g. 1000 V, 1250 V, 1600 V)
  • Capacitance and minimum parasitic internal inductance
  • Pulse current capability
  • Effective capacitor voltage and current (power losses)
  • Service life

Figure 2 shows a simplified equivalent DC link circuit with typical, concentrated parasitic inductances.

Simplifi ed equivalent DC link circuit with typical, concentrated parasitic inductances

Figure 2. Simplified equivalent DC link circuit with typical, concentrated parasitic inductances

Figure 3  shows the typical voltage characteristics of an IGBT turn-off process with and without snubber and compiles simplified equations for dimensioning the snubber circuit.

IGBT turn-off process

Figure 3. IGBT turn-off process: typical voltage characteristics with and without snubber; simplified equations for snubber circuit dimensioning

To absorb parasitic oscillations between C and L, voltage clamping may be implemented using an RC element (Figure 1b). This measure is often taken for low-voltage/high-current applications (e.g. MOSFET converters) to avoid parasitic oscillations in the DC link voltage at the module terminals when switching high currents.

Figure 1c and d show RCD networks. The integrated fast diodes should display low forward turn-on overvoltage and soft reverse recovery behavior. The design of the snubber network itself and the power module terminals (A,B,C) must be as low-inductive as possible.

An advantage of passive networks, besides their simple topologies, is that they do not require active components.

A disadvantage of this, however, is that the overvoltage limit value varies depending on the operating point of the converter. For this reason, dimensioning has to be based on the worst case scenario (overcurrent, short circuit, high di/dt).

Active clamping

Basic principle and types of active clamping

Figure 4. Basic principle and types of active clamping

The feedback arm consists of a Zener element Z and a series connected diode Ds , which will stop current flow from driver to collector when the IGBT is turned on. If the collector-emitter voltage passes the avalanche breakdown voltage of the Zener element, a current will be conducted to the IGBT gate via feedback coupling which will raise the gate potential to a value given by the IGBT transfer and output characteristic (ic = f(vCE ,vGE )) (Figure 5). The clamping process lasts as long as current is impressed by the series inductance. The voltage applied to the transistor is determined by the current-voltage characteristic of the Zener element.

The transistor operates in the active area of its output characteristic (safe operating area) and converts the energy stored in LK (often also referred to as stray inductance LS ) to heat (Figure 5.). Figure 5 explains these correlations by way of a simplified equivalent circuit and typical characteristics.

Simplifi ed equivalent circuit and typical current and voltage characteristics

Figure 5. Simplified equivalent circuit and typical current and voltage characteristics during active clamping of an IGBT (variant A)

The switching energy processed in the transistor switch during active clamping can be calculated using a simplified equation:

 E_{clamp} = \frac {L_s}{2} \cdot i_{co}^2 \cdot \frac {V_{CE_clamped}}{V_{CE-clamped} - V_{DC-link}}

The gate charge peak current needed to increase the gate-emitter voltage at the beginning of the clamping process is clearly shown in Figure 5.

The clamping circuit may be effective either directly at the gate or at the driver output stage.

The choice of clamping channel depends on the average power dissipation in the Zener element. The following principle applies: the higher the voltage difference between commutation voltage (DC link voltage) and clamping voltage, the lower the losses in the clamping circuit. Other possible selection criteria are the dynamic response of the circuit and the rate of rise of the Zener characteristic (Figure 6).

Static characteristics of selected Zener elements

Figure 6. Static characteristics of selected Zener elements A: Suppressor diode B: MOSFET during avalanche breakdown C: IGBT during avalanche breakdown D: Suppressor diode + MOSFET as amplifiers

Version A shown in Figure 6 can be achieved rather easily and may be used in low clamping energy applications (e.g. in aperiodic processes in voltage source inverters). The MOSFET and diodes in versions B and E are operated in avalanche mode. This mode of operation is to be specified explicitly in the datasheet and must be approved by the manufacturer. In versions C and D, the MOSFET/IGBT serves as to amplify the Zener current; version D boasts particularly high ruggedness.

Active clamping involves the following features:

  • simple circuit arrangement
  • the transistor to be protected is part of the protection itself and converts the main share of energy stored in the inductance during the clamping process
  • there is no need for power resistors and snubber capacitors
  • steep clamping characteristic
  • the switch voltage to be limited does not depend on the operating point of the converter
  • no separate power supply is needed
  • conventional drivers may be used
  • overvoltages during reverse-recovery di/dt of the inverse diodes are limited inherently
  • option to equip either every single transistor switch with a clamping circuit or to attach one central clamp for one or several pairs of switches

The principle of active clamping is applicable to both aperiodic (e.g. short-circuit turn-off) and periodic (e.g. in certain ZCS-topologies) clamping processes and has to be dimensioned accordingly.

Dynamic gate control

In the process of dynamic gate control, the di/dt and dv/dt of MOSFET and IGBT and the resultant induced overvoltages are directly determined by the driver. Simple dynamic gate control includes soft turn-off of IGBT and MOSFET in the event of overcurrents or short circuit; soft turn-off here is achieved either by applying higher gate series resistances or by implementing turn-off with a defined small gate current (current source control) (Figure 7).

Possible IGBT soft turn-off processes in the event of malfunction

Figure 7. Possible IGBT soft turn-off processes in the event of malfunction (extremely simplified diagram) a) Increased RGoff b) Current source control

In more complex driver circuits, the gate series resistors are switched consecutively even during standard-mode converter operation in order to optimize switching times, switching losses and switching overvoltages (e.g. "intelligent turn-off" function in SKYPER52 driver). In a number of drivers known from technical literature and real applications, the IGBT / MOSFET di/dt and dv/dt are detected passively and fed back dynamically to the gate or the driver output stage. (Figure 8).

Direct dynamic dv-dt and di-dt feedback

Figure 8. Direct dynamic dv/dt and di/dt feedback (extremely simplified diagram)

Here, the information on di/dt or dv/dt is obtained by inductance at the emitter or by capacitance at the collector.

DC link voltage with optimised dynamic feedback

Figure 9. a) Overvoltage protection by means of combined active clamping and dynamic feedback b) Oscillograph of a 1200 V Trench-Field-Stop IGBT turning off from overcurrent level at high DC link voltage with optimized dynamic feedback (VD =900 V, IC =400 A, VCE_peak =1100 V)

The protective circuit depicted in Figure 9 uses a combination of active clamping and dynamic feedback. Active clamping and dv/dt feedback are executed consecutively, i.e.. both gate and driver output stage are directly affected by protection. The dynamic behavior may be controlled by suitable dimensioning of DZE , DZG , CZE and CZG . Feedback from di/dt is implemented by a small inductance (...nH...); the response threshold can be set via parameter DZR.

Overvoltage limitation between control terminals

Overvoltage limitation between control terminals is required to maintain the maximum gate-emitter/gate-source voltage, on the one hand, and limit the dynamic short-circuit current amplitude, on the other hand.

Figure 10 provides an overview of simplified passive circuits. To optimize efficiency , the limitation circuits should be designed for low inductance and be positioned as close to the gate as possible. The use of fast Schottky diodes to clamp the gate voltage to the driver supply voltages has proven particularly efficient in switching applications.

Simple passive gate voltage limitation circuits

Figure 10. Simple passive gate voltage limitation circuits

 

For more information, please read:

General Voltage Surge Protection

Preventing Overvoltages with Varistors

Snubber Circuits Based on Silicon Avalanche Diodes

I²t of IGBT and Other Power Transistor Circuits

 

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