Posted on 01 June 2019

Power Over Ethernet Design

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Power over Ethernet (PoE) is the technology that integrates both power and data over a standard Ethernet cable. PoE equipments such as IP phones, security cameras, wireless local area network nodes, and even musical instruments make use of the PoE technology.

By Werner Berns, Application Design Center Manager and Michele Sclocchi, Senior Principal Applications Engineer Power Management Europe, National Semiconductor


Power over Ethernet solutions are rapidly growing in popularity, because PoE devices do not require wall-mounted power supplies and overall system costs are lower. For Internet Protocol (IP) telephony, uninterruptible power supplies (UPS) guarantee higher reliability and less susceptibility to power surges, theft, interruption or disconnection. In addition, the worldwide usage of the RJ-45 connector ensures global compatibility of PoE devices. Finally, PoE-enabled devices offer superior management flexibility with remote power up/down capability.

PD mode of operation compatible with IEEE standard

The IEEE (Institute of Electrical and Electronic Engineers) approved the standard for PoE products in June 2003. The IEE802.3af standard ensures that the power is delivered safely to both legacy devices and power-enabled devices, the cabling infrastructure is preserved, and the delivery of power does not cause any data degradation. The IEEE has standardized on the use of 48VDC voltage transferred through a standard Cat 5e Ethernet cable via two of its four twisted copper pairs. The amount of power available is limited into four classes from 4 watts to a maximum of 15.4 watts to be delivered per port. A power sourcing equipment (PSE) performs some precise measurements of the connected powered device (PD) to insure that the PD complies with the standard. If the PD complies, the PSE sends the 48V power to it. The main challenges of a well optimized PoE design is understanding the complexity of the power-on sequencing, which is not typically encountered in regular power supply designs, and the optimization of the required power conversion.

Power-On sequencing

Power-on sequencing (Figure 1) must follow a specific and well-managed power sequence. The PSE detects the PD connection by measuring the cable impedance (Signature); if the impedance is above 23.75kΩ and below 26.25kΩ, the PSE will consider a PD to be present. An under voltage lockout (UVLO) for voltages over 23V is used to prevent a bad signature resistance and to wait for the full-voltage on the PD before charging up the input capacitor and starting the output voltage regulation.

The different power sequencing phases in more detail

Optionally, a classification can be taken from the PD to indicate to the PSE the equipment’s power class. Besides detection and classification, the PD should be able to limit the current, both inrush transient and dc current. This is to prevent the cable from overheating and the connectors from damaging by an excessive current. Once UVLO has been released, the LM5073 will charge up the output load capacitance which is the input capacitance to the switching mode power supply (SMPS). To do this in a controlled manner, the main power FET is current-limited to less than 420mA (for a PD device complying with 802.3af) with programmable inrush current limit range of 100mA to 800mA.

The PD should also present the Maintain Power Signature (MPS), a flag that allows the PSE to maintain the 48V output to the cable. The MPS includes >5uF capacitor between the power lines (the AC MPS) and/or 10mA min drawn by the PD (the DC MPS). Falling out of these limits, the PSE will remove the power even if the PD is still connected. The >5uF requirement is the reason why the DC-DC stage input capacitor employs >10uF in total.

In case a PD is disconnected from the cable link or commanded by the Ethernet server, the PSE will also cut off the power and the channel of the cable link becomes de-energized again, awaiting all types of devices to access safely.


The PD’s PoE interface could be implemented with discrete components; however an integrated solution such as the LM5073 provides the following key advantages:
• Facilitates the PD design with only very few external components.
• Shortens the design cycle.
• Reduces board size area and results in the best possible PCB layout.
• Proven interoperability with PSE units.
One of the limitations of PoE is the maximum input DC current, which should not exceed 350 mA DC (transient current limit is 400 mA). In terms of power, this limits the maximum input power to 12.95 Watts (37V x 350 mA). This again limits the usable output power for the working circuits to about 10W typical in case the DC-DC conversion efficiency is about 80% (Figure 2).

Typical PD requirements

Given PoE’s cost sensitivity, a flyback topology for the DC-DC conversion is the most popular solution, as used in National Semiconductor’s earlier single chip devices such as the LM5070, LM5071, LM5072 (including the PWM controller). However, in some applications, flyback topology may not meet the designers’ optimization needs.

Power supply challenges

Many of the designers that use PoE solutions are not necessarily power supply design experts, and may prefer existing power supply solutions. Depending on the power requirements, applications, constraints and priorities, the optimum power solution may vary and a single chip generic solution may not give enough flexibility, because they mainly supply flyback solutions.

Table 1 summarizes some key benefits for each topology over design requirements.

Table 1

LM5073 offers compelling features and benefits

The LM5073 is a high voltage PoE controller and contains all of the features needed to implement a PoE device. This includes sequencing and power insertion-limiting requirements combined with the flexibility of DC-DC topology selection, best suitable for a particular design. It also simplifies the non-isolated PD design by enabling the use of National’s well-known Simple Switcher® family, which does not require an external power MOSFET.

National’s LM5073 has a number of unique characteristics that make designs easy:
• Combines a fully compliant IEEE 802.3af PD interface.
• Provides fixed signature impedance, user programmable UVLO thresholds, in-rush current limit, and classification current.
• Withstands input voltages of up to 100V.
• Protection for in-rush/fault current limiting and thermal shutdown.

UVLO threshold and hysteresis: designer can program the undervoltage lockout (UVLO) trip-point and hysteresis completely independently, with two external resistors. Enables isolated or non isolated dc-dc power supply configuration. Internal hot-swap MOSFET can provide double current of the existing PoE standards, allowing future PoE+ higher power applications (requires specific PSE) . Easy to use auxiliary power usage with front and rear aux power, down to 9Vdc (Figure 3).

LM5073 Powered Device system partitioning

Other advantages include:
• Enables to select the best suitable topology of the DC-DC converter for a particular application. For instance, it allows using National’s Simple Switcher regulators (e.g. the LM5576) in a non-isolated application, thereby reducing the costs. It can select the LM5025/26 active clamp controller for a high efficiency design, etc.
• It has built-in over voltage protection (OVP) for the DC-DC converter, such that this 100V rated part can be safely used with a 65V rated DC-DC converter.
• The complementary active Hi/Lo shutdown control provides a versatile interface to various DC-DC converters.

Typical non-isolated PoE DC-DC converter design

A typical non-isolated application of the LM5073 is a buck implementation using National’s well-known Simple Switcher products. Figure 4 shows a typical 15W non-isolated PoE solution using a cascade connection of LM5073 plus LM5576, the new generation of emulated peak current mode Simple Switcher regulator. The emulated peak current mode control scheme offers the unique capability of a high voltage conversion rate, while maintaining good efficiency, high switching frequency and the simple design of a buck converter. The challenge of accurate switch current measurement in high frequency bucks can be avoided with a new method that emulates the buck switch current. The inductor current can be reconstructed by measuring the current at the end of the switching cycle in the free-welling diode and adding on top of it a ramp that is proportional to the current ramp in the inductor.

Typical non-isolated buck PoE design with LM5073 and LM5576

To emulate the ramping portion of the inductor’s current, an external capacitor is charged with a constant current proportional to the difference between the input and the output voltage. The resulting ramp voltage at the capacitor is proportional to the ramping current in the inductor itself (Figure 5).

Emulated current mode control ramp generator, used in National’s new Simple Switcher regulators

Emulated peak current mode offers all the intrinsic advantages of a classic current mode controller, without the noise susceptibility problem often encountered from diode reverse recovery current, ringing on the switch node and current measurement propagation delays, while achieving very small on-times necessary to regulate low output voltages from high input voltage rails such as in PoE applications.

Typical isolated DC-DC converter design for PoE power supplies

The most popular and obvious topology for PoE applications is the flyback converter. Flyback offers the simplest and cheapest solution for a multiple output isolated application with the right compromise between cost and efficiency with typical output power ranges between a few watts up to 20-30 watts. Though flyback converters at low power levels are usually operated in discontinuous conduction mode (DCM), the best efficiency is obtained in the continuous conduction mode (CCM), where, for a given output power, the RMS current in the primary side FET is smaller. The two arguments generally used to justify DCM operation are a smaller transformer and the migration of the troublesome right half plane zero of the control transfer function to a high enough frequency as to render it irrelevant. Furthermore, for the PoE power levels and input voltage range, a quick calculation shows that the right half-plane zero is located at such a high frequency that it is not a problem. The right half-plane zero for a flyback converter in CCM is at:

Equation 1

Where Vin, D, Iin and L are respectively the input voltage, the duty cycle of the primary side FET, the average input current, and the magnetizing inductance of the power transformer. A reasonable value for L in CCM operation in this application is 100μH. Together with minimum Vin = 26V, maximum Iin = 360mA, and corresponding D = 0.4, this locates the right half-plane zero at a lower frequency limit of fz = 64kHz under all operating conditions, which gives a negligible impact on the design of the feedback compensator in most PoE applications.

The high integration level of the LM5070, LM5071 and LM5072 controllers enhances IEEE802.3af compliance design with a minimum number of external components. Figure 3 illustrates a typical PoE application circuit with the LM5072, National Semiconductor’s integrated 100V PoE PD interface and PWM controller with auxiliary support. The LM5072 provides the flexibility for the PD to also accept power from auxiliary sources, such as AC adapters, in a variety of configurations.

Fast PWM current mode controller scheme is preferred in flyback continuous mode topology, with the advantage of controlling and limiting the input current, and regulating the output voltage within the same circuit. Line and current transient response is done by variation of the duty cycle of the power transistor. Duty cycle is determined by both output voltage error and the saw tooth waveform, generated from the primary inductor current through the external current sense resistor.

Typical PoE application circuit with LM5072 controller

Cycle-by-cycle current limit is accomplished comparing the current sense signal with an internal reference voltage. The inherent problem of instability due to sub-harmonic oscillation for duty cycles greater than 50% is avoided with an internal slope compensation of the current ramp signal.

This article had described the advantages and the flexibility of National Semiconductor’s new LM5073 controller that integrates all the features needed for an optimized design.


The LM5073 offers the highest flexibility for PoE applications for both isolated and non-isolated power designs. Flyback CCM mode is widely used in PoE applications when isolation is required, offering the best compromise between efficiency versus complexity and design cost. Buck topology is the most suitable solution when isolation is not required, offering the best compromise between cost and performance.



1) Power supply design for Power over Ethernet powered devices. online at: by Barry Signoretti, and Joe de Nicolas, application and design engineers, National Semiconductor.
2) PoE powers Ethernet into new applications, by Martin Schiel, Future Electronics Europe.
3) LM5073 datasheet and release design notes.
4) A detailed flyback design guide is offered during National’s European Power supply design courses in autumn 2007; dates to be announced soon on National’s website.



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