Posted on 01 January 2019

Powering FPGAs Using the LM20k Family

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These are the PowerWise Synchronous Buck Regulators

The LM20k PowerWise® synchronous buck regulators are National Semiconductor’s newest family of full-featured point-of-load integrated regulators. The LM20242 operates from input voltages of 4.5V up to 36V and is capable of delivering up to 2A to outputs as low as 0.8V.

By P. Ranucci, Design Engineer, National Semiconductor, Tucson AZ


The LM201XX regulators operate from input voltages between 2.95V and 5.5V and can deliver up to 3A, 4A, or 5A to output voltages as low as 0.8V. Utilizing PowerWise® FET technology the LM20k family delivers highly efficient power supply solutions for the multiple rails required to power an FPGA. All members of the family are currentmode controlled providing excellent line regulation and load transient response and requiring only two external components for compensation. All parts feature precision enable, UVLO, OVP, over-current protection, over-temp protection and PGOOD. The soft-start pin can be used with a capacitor to control start-up inrush current or with an external voltage source to track or sequence multiple supplies. All parts can start into a pre-biased output without discharging it and all parts have a diode emulation mode for higher efficiency at light loads. Power supply design is facilitated by easy-to-use software tools on the National website. The parts in the LM201XX family are differentiated by output current capability (3A, 4A, and 5A), frequency (500 kHz, 1 MHz and 1.5 MHz), and synchronization mode (free-running, sync-in, sync-out and external resistor adjust). Based on the supply requirements of the FPGA design, the LM20k family can provide a small, efficient, and complete solution.

FPGA Power Supply Requirements

There are several high performance FPGAs currently on the market such as the Xilinx Virtex and Spartan series, and the Altera Cyclone and Stratix series. All of these require multiple power rails including the FPGA core, the I/O, as well as additional rails for powering clocks, PLLs, transceivers, and other circuitry. The core voltage in FPGAs can currently be as low as 0.9V with the current demand for this rail being highly dependent on the utilization of the FPGA. The I/O rail can also have demanding power needs depending on the number of I/O registers employed in the FPGA design. FPGA manufacturers offer power estimation software which assists users in identifying their power needs early based on the performance requirements of the design. Most of the latest generation FPGAs have internal POR circuitry which can eliminate the need for power rail sequencing. Select FPGAs specify input inrush currents only for particular power-up sequences and others require certain rails to be greater than or equal to others to avoid start-up or latch-up problems. Start-up time requirements for FPGA rails are varied ranging from 100-200us at the fastest and 50-100ms at the slowest.

Designing a Power Supply Solution

FPGAs are used in a multitude of applications, each with unique power supply system requirements. Some designs require high accuracy rails with excellent load transient response while others require high efficiency at light and heavy loads. Still others may be required to fit into a small area on the board. National’s website has reference designs specifically optimized for each of these requirements. Evaluation boards are available for each member of the family using a conservative design approach, though components on the evaluation boards can easily be user customized to reflect the application needs. Another benefit of having a full family of parts is that designs can be prototyped without optimization in the early stages of board design and later replaced once the system requirements are fully characterized. For example, in the early stages of design, a 5A power supply could be designed for each FPGA rail. Later when the current requirements are more well-known, lower current members of the family could be used as drop-in replacements. Additionally board layouts could be targeted for ease-of-use during early stages of the design and later optimized for space. The LM20k family has extensive application notes, reference designs and online design tools to make power supply design simple, while still allowing users to fully customize their power supply solutions to fit their needs.

Example FPGA Power Supply Design

Example FPGA Power Design

For the purposes of illustration an example FPGA power supply design is shown in block diagram form in Figure 1. This design features an LM20145 supplying a core voltage of 1.1V capable of delivering up to 5A, an LM20154 supplying an I/O voltage arbitrarily chosen as 1.8V capable of delivering up to 4A and an LM20133 supplying an auxiliary rail of 2.5V at 3A. At full load the power supplies will only dissipate 1.21W, 1.08W and 0.56W respectively. Output voltage rails can regulate within 1.5% over temp and are also easily scaled by a resistor divider between the output and the FB pin. This particular configuration can operate from an input voltage rail between 2.95V up to 5.5V though the most common rails available are usually 3.3V and 5V. Regulation from higher voltage rails can be achieved by using the LM20242. Output voltages down to 0.8V can be individually supplied using the LM20242 so long as the current requirement is below 2A. For higher output currents a 2-stage conversion can be made using the LM20242 with a member of the LM201XX family. Figure 2 shows the LM20242 powered by a 12V rail sub-regulating a 5V supply which powers the LM20145 of the first example. Generally buck-switcher efficiency decreases with duty cycle, but the overall efficiency of this conversion is 74%, which is very high for an effective 12V-1.1V conversion at 5A. The 5V rail supplying the LM20145 can also be used to power additional circuitry up to 600mA at full load on the 1.1V rail.

12V Vin Conversion to 1.1V at 5A

Design Features:

Frequency Adjust

One of the features highlighted in this design is the many useful frequency synchronization options available. The LM20145 in Figure 1 has a resistor adjustable frequency. One of the most common uses for frequency adjust is to keep switching noise (at the switching frequency and its higher harmonics) out of certain frequency ranges, like the AM radio band, and from interfering with other sensitive analog circuitry on the board such as receivers and transmitters. Frequency adjust can also be used to optimize a power supply solution for efficiency, space or output inductor size. In current-mode switchers, inductor current ripple is generally targeted to be 20%- 40% of the output current. Higher frequency operation allows the use of lower value, smaller inductors while lower frequencies require larger value inductors to maintain reasonable values of ripple current. This is due to the fact that ripple current is inversely proportional to the product of switching frequency and output inductance. Higher frequency operation can lower overall solution size, however, switching losses increase with frequency so for high efficiency designs, lower frequencies are preferred. Lastly, some lower cost inductors can have large tolerances on the order of +/-30%. In those cases some non-standard switching frequency, like 515 kHz, may be required to maintain an appropriate amount of current ripple over the operating range of the part.


The LM20133 and LM20134 have phase-locked loop based synchronization capability and can synchronize to any periodic waveform, within the frequency and amplitude specifications on their respective datasheets, which is applied to the sync-in pin. These parts can be synchronized to external clock signals to keep switching noise from interfering with other circuits as well as synchronized to other LM20k parts. In the example in Figure 1, the LM20133 is synchronized to the sync-out signal coming from the LM20154 which has the added benefit of synchronizing the two parts 180° out of phase. This reduces input ripple current on the input power supply and can thus reduce the input capacitor requirements. Figure 3 shows an example of input ripple current reduction using out of phase converters. This technique can also be used in a “current sharing” application where two converters are used in parallel to supply one output at higher output currents. If a clock signal or a sync-out signal is not available, the LM20133 and LM20134 can still be synchronized to the SW pin of a neighboring power supply. To ensure proper synchronization in this case the “master” supply must be kept out of diode emulation mode. The extra ringing that can occur as a result of zero current in the output inductor can be interpreted as a higher frequency signal which the sync-in part will attempt to synchronize to.

Input Capacitor Current Comparison of LM20134-LM20154

Pre-biased Start-up

In FPGAs, as well as many other multi-rail integrated circuits, there can be parasitic conduction paths between the different power rails. Conducting through these paths could cause excessive inrush currents at start-up or even latch-up the FPGA. This could be caused by a bad power-up or power-down sequence of the power rails or by one rail pulling up another rail when the power supply is trying to pull it low. This second case is represented in Figure 4 where a high current conduction path exists between power rail 1 and power rail 2. If power supply 2 tries to discharge power rail 2 large currents can result in both power supplies as well as in the FPGA. All members of the LM20k family have built-in “pre-biased enable” circuitry which ensures that the power supply will never try to discharge an output voltage at start-up. The supply will gently charge up the output to its final value only when the SS/TRK pin has exceeded the FB pin voltage. This protects both the FPGA as well as the power supplies from excessive current.

High Current Path Through Two FPGA Rails


Usually FPGA manufacturers will specify a start-up sequence for their power rails or at least specify the inrush currents under a specific start-up sequence. The LM20k family has multiple flexible sequencing options for various power-up schemes. In the example design, the LM20145 is “tracked” off of the I/O rail by using the SS/TRK pin with a resistive voltage divider. This type of sequencing, known as simultaneous sequencing, allows the voltage difference between the two rails to be minimized which can eliminate parasitic conduction paths between the two rails. The resistor ratio can also be tailored such that the second output voltage achieves regulation later as shown by the dotted line in Figure 5. Perfect “ratio-metric” sequencing can be achieved by connecting both parts’ SS/TRK pins together with a capacitor to ground as shown in Figure 6. This type of sequencing is useful when both outputs need to arrive at their regulated voltages at the same time. Another type of sequencing known as “sequential sequencing” involves enabling one power supply after another supply has reached some value. In the example design, the precision EN pin on the LM20133 allows it to be sequentially sequenced by the LM20154 using a voltage divider from the I/O rail. The precision enable pin ensures +/- 8.5% accuracy in the trip point. The nominal trip point is user customizable based on the resistor divider as shown in Figure 7. An even more accurate method for sequential sequencing, shown in Figure 8, involves attaching the PGOOD pin of one supply to the EN pin of another. In that case the second part will enable when the output of the first has reached 94% (typ) of its final value and is accurate within +/- 2%.

Figure 5

Figure 6

Figure 7

Figure 8

Simplicity and Flexibility

The LM20k family offers a full range of features and options enabling an FPGA designer to fully customize their power solution to meet the system application needs. In addition to the features mentioned above, there are extensive fault-monitoring and protection circuits which keep both the FPGA and the power supply safe in the event of a fault. Although the LM20k offers extensive flexibility and many options for customization, a simple robust power supply solution, requiring few components, can easily be designed from one of the reference designs on National’s website or using the intuitive software tools available for these parts. The LM20123, LM20124, and LM20125 are easy-to-use, fixed frequency parts which offer 3A at 1.5MHz, 4A at 1MHz and 5A at 500 kHz. The LM20133 and LM20134 have sync-in features and the LM20154 offers a sync-out. The LM20143, LM20144, LM20145 and LM20242 are all frequency adjustable parts offering output currents of 3A, 4A, and 5A with the LM20242 offering 2A at an input voltage range of 4.5V to 36V. Full details of the many options and useful features of the entire LM20k family can be found by accessing the product datasheets on National Semiconductor’s website.



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