**Varistor model**

**Varistor model**

The development of a varistor model for the “PSpice Design Center” circuit simulation program allows varistors to be integrated into computer assisted development of modern electronic circuitry. In the PSpice modeling concept, a varistor is represented by its V/I characteristic curve, a parallel capacitance, and a series inductance. The structure of this equivalent circuit is shown in figure 1.

In the model, the V/I characteristic curve is implemented by a controlled voltage source V = f (I). An additional series resistance Rs = 100 μΩ has been inserted to prevent the impermissible state that would occur if ideal sources were to be connected in parallel or the varistor model were to be connected directly to a source.

The following approximation is used for the mathematical description:

**log V = b1 + b2 · log (I) + b3 · e ^{-log (I)} + b4 · e^{log (I)} I>0**

**This means that the characteristic curve for any specific varistor can be described by the parameters b1…b4.**

Figure 2 shows a typical V/I characteristic curve for the varistor and the corresponding parameters b1…b4.

The tolerance bandwidth of the V/I characteristic curve can be shifted to include cases of:

- upper tolerance bandwidth limit: highest possible protection level for a given surge current, and
- lower tolerance bandwidth limit: highest possible (leakage) current for a given voltage.

In the model the capacitance values stated in the product tables are used. The dependence of the capacitance on the applied voltage and frequency is extremely low and can be neglected here. It is not permissible to neglect the inductance of the varistor in applications with steep pulse leading edges. For this reason it is represented by a series inductance and essentially is determined by the lead inductance. As opposed to this, the internal inductance of the metal oxide varistor may be neglected. The inductance values in the model library are chosen for typical applications. If longer leads are used, insertion of additional inductances must be considered if necessary. In the case of disk varistors the inductance of the leads is approximately 1 nH/mm.

The PSpice simulation models can be downloaded from "Design Tools from TDK EPCOS".

**Limits of the varistor model**

**Limits of the varistor model**

For mathematical reasons the V/I characteristic curves are extended in both directions beyond the current range (10 mA up to I_{max}) specified in the given data book, and cannot be limited by the program procedure. The validity of the model breaks down if the specified current range is exceeded. For this reason it is imperative that the user consider these limits when specifying the task; the upper limit depends on the type of varistor. Values of < 10 mA may lead to incorrect results but do not endanger the component. In varistor applications, it is only necessary to know the exact values for the leakage current in the < 10 mA range in exceptional cases. As opposed to this, values exceeding the type-specific surge current I_{max} may lead not only to incorrect results in actual practice but also to destruction of the component. Apart from this, the varistor model does not check adherence to other limit values such as maximum continuous power dissipation or surge current deratings. In addition to carrying out simulation procedures, adherence to such limits must always be ensured, observing the relevant spec given in the data book. In critical applications the simulation result should be verified by a test circuit. Also, the model does not take into account the low temperature coefficient of the varistors.

**For more information please read:**

V-I Characteristics - Varistors

Protecting Appliances Using Inrush Current Limiters (ICL)