Posted on 29 June 2019

Reducing the Cost of Using Off-The-Shelf Power Management ICs

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With the demise of industry wide second sourcing and the move to developing purely proprietary designs, Power Management IC companies have raised the profit bar to new heights. Good for them and bad for you.

Bob Frostholm, JVD Inc.


With the notable exceptions of cellular phones, notebooks, and other highly competitive consumer driven applications, Power Management product designs can easily last for years, even decades without change.

There are many hidden costs associated with using off the shelf Analog solutions. As you will see shortly, the biggest hidden cost is the cost of the off-the-shelf product itself.

Look at the IC Master ( and investigate DC to DC Converters, 1,214 pages with 25 parts per page, over 30,350 DCDC converters from which to choose plus over 40,000 SMPS controller chips, and 98,000 voltage regulators. With so many standard products to choose from, is there really a need for Analog ASICs?

The answer is unequivocally, yes. According to market research company Gartner, ASICs represented 54% of the Analog market in 2010, while InStat places the figure closer to 59%. Regardless, it is evident that the demand for Analog ASICs far exceeds that of standard Analog ICs.

Why? A. Differentiation, B. IP Protection, C. Cost, D. All of the Above? The answer is D.

Lack of Differentiation

The quantity and variety of Analog ICs being introduced gives the OEM a large number of options to choose from when beginning a new design. However, no one chip is a best solution for every OEM.

Analog ASICs provide the perfect solution for OEMs seeking to offer unique products into the marketplace. Features not available in standard products are easily incorporated into an Analog ASIC. Similarly, features found in standard products that are not needed for a particular product can be eliminated and thus reduce the cost of the overall solution. Analog ASICs allow the end equipment manufacturer to introduce the customization that incorporates their company’s uniqueness.

Lack of IP Protection

Additionally, the use of standard Analog products opens the door to design plagiarism. The use of standard products reveals exactly what you are doing and how you are doing it. While it may have taken your company 15 months to design, debug and release your new product to market, by exposing your complete circuit design, your competitor can avoid the first two lengthy and expensive steps and move almost immediately into production.

Your competitor has a strong advantage, no design costs to recover. Not having these expenses to amortize puts him at a significant cost advantage.

Economic Value of Analog ASICs

Hiding your circuit design in an Analog ASIC creates a serious impediment to your competitors who might otherwise attempt to reverse engineer your ideas into their competing product.

Standard Products Cost Too Much

Analog ASICs are not for everyone. Like any component choice, they must offer the best economic value for the application. Any associated up-front NRE costs (Non-Recurring Engineering) must be factored into the equation along with hard tooling (wafer fabrication masks, test hardware and software and more). In addition, there is the issue of time. Analog ASICs can take from six months up to a year or more to be ready to use in a production environment.

Analog ASIC NRE and tooling costs vary greatly, from $60-$75K on the low side to several hundred thousand dollars on the high end. Initially, the emotional impact of a large up-front charge can be blinding and often the gut reaction is to dismiss the option entirely without further investigation. Unfortunately, this is where most Analog ASIC discussions erroneously end, when in fact it is just the beginning.

When you buy a standard Power Management IC, what portion of the price you pay is actually the cost to make the chip? Unfortunately, you will never know the exact answer to this question. But if you are using the latest technology, it could be as low as 10-20%, meaning 80-90% of what you are paying is contributing to the chip supplier’s gross profit.

Gross Profit = Company Annual Sales – Actual Cost to Build the Products Sold

Public Power Management IC companies report their Gross Profits in their annual report, reflecting sales over the recent 12 month period. GPM is an average, meaning half of the company’s sales during that prior year achieved more than the reported GPM and half were below the reported GPM.

Depending on the manufacturer of the Power Management chips you want to use, and the GPM of the products you selected for your new design, it may be cost advantageous to consider replacing them with an Analog ASIC as you develop your product. Independent Analog ASIC companies offer aggressive NRE, Tooling and unit prices to win your business.

The economic value (EV) of an Analog ASIC is easy to calculate once you know the expected volume costs (EVC) of all the Standard IC functions you hope to displace.

1. Identify the high cost points of your design, the Buck-Boost Converters, LDOs, A/D and DAC, Op Amps, etc.

Selected Analog IC Players

2. Contact a well established Analog ASIC Company that does hand crafted Analog designs. Avoid the ubiquitous “Mixed-Signal” ASIC companies. Their analog skills are often limited to selecting analog cells from a fixed digital library, not creating innovative designs that will bring value to your chip. Simply using cells from a library to build your custom power Management Chip can be a recipe for failure.

3. Estimate the lifetime volume (LV) requirement of your design and request a quotation for NRE, tooling and unit costs (UC).

             EV = (EVC- [{(NRE + Tooling)/LV} +UC])

For example, high cost points in a recent design were identified as a Linear Tech Gain Programmable Precision Instrumentation Amplifier, a National Micro Power Ultra Low-Dropout Regulator, an Analog Devices 40 μA Micropower Instrumentation Amplifier, and several other components.

The expected combined volume cost for these components was $3.56. All were able to be combined into an Analog ASIC that sold for $0.93. Total NRE and Tooling was $278K. The product lifetime was expected to be ten years, with monthly volumes averaging 15K units.

           EV = ($3.56) – [($278,000)/1,800,000) +$0.93]

           EV = $2.47/ product

By developing a simple sensitivity analysis chart, it is easy to see the impact if there is some degradation to the prices of the standard Analog ICs. The analysis also projects lifetime savings based on under and over achievement of the lifetime volumes of the chip.

Total Lifetime Cost Savings

The argument is compelling in terms of the savings by using an Analog ASIC versus standard analog ICs.

Lifetime cost savings graph


Studying GPM can offer an early indication of the viability of your design conversion to an Analog ASIC. If possible, review the GPM of your selected Analog IC vendors. Remember, half their sales revenue is generating GPM greater that the figures shown in their annual report. Where do the products you use fit into that equation? If you are purchasing new designs, chances are that the products you are using are well into the upper half. If you are thinking of saving money with a cost down of your product, and you have the time to develop a custom solution, you might want to consider an Analog ASIC.

While cost is a compelling reason to move to an Analog ASIC because it is an easily measured metric, do not underestimate the value of IP Protection and Unique Differentiation. Many times these critical aspects of an Analog ASIC’s economic value are overlooked.



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