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Posted on 01 December 2019

State of the Art of Smart Power Modules

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Transfer-molded package with DBC substrate

Intelligent power modules with transfer-molded package are a current trend in low power motor drives both in consumer appliances and general industrial applications. Fairchild SPM(Smart Power Module) covering power range of 0.05 ~ 7kW has established its dominant position thanks to its compactness, functionality, reliability and cost-effective performance.

By Dae-Woong Chung and Bum-Seok Suh, SPM R&D Group, Fairchild Semiconductor

 

By using transfer-molded package with DBC substrate, power density can be increased and various circuit topologies such as 3- phase inverter, SRM drives and power factor correction can be implemented in one package. Also advanced and application-needsmatched power chips and driver ICs improve performance and reliability of the system. This paper presents state-of-art technology implemented in the SPM from the viewpoint of device, package and system configuration.

Companies that serve the home appliance and low-power industrial market are increasingly moving away from vertical integration of their manufacturing to focus on their core competencies, such as brand development, customer service, and logistics. Integrating discrete power semiconductors and drivers into one package allows them to reduce the time and effort spent on design, ensuring they have a solid power electronics section in their appliance. This integration enables these companies to accelerate their products' time-to-market, bringing innovation to their end customers faster.

One aspect driving the need for innovation is the existence of longer term energy saving initiatives, which are forcing the adoption of inverter drive technology. Different types of appliances use different drive solutions, so each type of system has different power stage requirements, in terms of both circuit topology and power levels. This article shows a number of examples where different devices can be successfully integrated into one module to satisfy these diverse needs.

From 1999, when the SPM (Smart Power Module) series was first developed, to the present, Fairchild has developed various SPM series with the power range of 50W ~7kW in consumer appliances and low power general industry applications [1]. This article will detail the SPM design concept and its implementation of semiconductor (power devices and control ICs), package and system technology.

Power Devices

As a result of IGBT technology improvements, the series of SPM has been able to be upgraded since the unveiling of its first version into the industrial market.

With the introduction of sub-micron design rule, the reduction of chip size is accelerated while the current density significantly increases. A better trade-off performance relationship between the turn off loss and on-state voltage drop while ensuring the adequate SOA has been realized in the latest version of IGBT chips. Figure 1 shows how much improvement has been made for IGBT technologies. It is apparent that V5 IGBT will deliver exceptional device performance, which enlarges power capacity with the smaller package.

IGBT improvement in SPM building

Need for low power loss operation often requests fast switching speed, which results in an increased recovery current and high dv/dt. It attributes to large EMI (electromagnetic interference), high surge voltages and motor leakage currents. During the development of SPM series, the EMI problem has been taken into account and the gate drive was optimally designed to control switching loss of the integrated IGBTs at the cost of the high switching loss. Thanks to the low on-state voltage drop of IGBT, total power loss can remain the same while realizing low EMI characteristics. The typical dv/dt characteristics of SPM are shown in Figure 2. The turn-on and turn-off dv/dt is lower than 5kV/us under its rated current.

Switching dv-dt characteristics. (Vpn=300V, Vcc=15V, 25deg, 20A rated current)

In addition, for better ESD protection, poly silicon back-to-back diodes between the gate and emitter are employed with the sufficient clamping voltage. The ESD level of HBM 2.5kV and MM 300V is obtained with chip area 2350 x 2018 um^2. Employing the integrated protection diodes, all SPM products meet the industrial standard ESD level.

Driver ICs

HVIC and LVIC are designed with minimum necessary functions especially suitable for the inverter drives of consumer appliances due to cost effectiveness. Design considerations include chip downsizing by fine process technology, active-high interface for direct drive by a 3V feed micro controller, low power consumption, increased noise immunity, good stability against temperature variation and so on.

One feature of HVIC is its built-in high voltage level shifting function which enables the PWM input from micro controller to be directly transferred to high side power device as shown in Figure 3. In addition, by using external charge reversing capacitors, SPM can be driven by a single control supply.

High-side driver configuration.

On the other hand, HVIC is sensitive to external noise since its signal is transferred by pulse signal and SR latch [2]. High dv/dt switching of driven IGBT, especially, is the most dangerous type for this kind of pulse driven HVIC. Assuming the parasitic capacitance of the LDMOS seen at the drain is CM and the on-dv/dt of high side IGBT is dVS/dt, CM must be charged with the large current, CM*dVS/dt, for the LDMOS drain voltage to follow the fast changing VB voltage which is coupled to VS by bootstrap capacitor CBS. The large charging current makes excessive voltage drop on R1 and R2 to abnormally trigger the S-R latch.

To overcome noise sensitivity, noise canceller with unique topology has been developed as shown in Figure 3 [3]. The V/I converter converts the level shifter’s outputs to the current information. For the common-mode noise, which has high dv/dt, the V/I converter gives same outputs. Whereas, the V/I converter outputs are different from each other for normal operation, as only one of two LDMOSs operates at a normal level shifter operation. Thus, it is not difficult to determine whether the V/I converter output is due to noise or not. Once the noise canceller recognizes a common-mode noise intrusion, it absorbs the current outputs of the V/I converter. Then, an I/V converter reconstructs the voltage signal, which swings between VB and VS supply rails from the current outputs of the V/I converter. Finally, the amplified signal is sent to the S-R latch.

Another merit of V/I and I/V conversion is that the allowable negative VS voltage is no longer governed by the threshold level of the circuit. Owing to its unique topology, Fairchild HVIC demonstrates good noise immunity against high dv/dt noise up to 50V/nsec and allows an extended negative operation up to VS=-10V @ VBS=15V approximately.

LVIC takes responsibility of all protection functions and its feedback to micro controller. Its protection circuit monitors control supply voltage, LVIC temperature and the IGBT collector current with external shunt resistor, and interrupts the operation of the IGBTs at fault situations. The related items should be independent of temperature and supply voltage. As an example, Table 1 shows the detection voltage level of overcurrent protection in LVIC.

Over-current detection level of LVIC (0.5V typ).

The fault signal is used to informing the system controller if the protection functions have been activated. The fault signal output is in an active low open collector configuration. It is normally pulled up to 3.3V to 15V via a pull-up resistor. When a fault occurs the fault line pulls low and all the gates of the lowside IGBTs are interrupted. If the fault is caused by over current, the output asserts a pulse and is then automatically reset. The preferred low signal time duration depends on its applications. For example, several milliseconds are preferred in home appliances, but one or two times of IGBT switching frequency is preferred in an industrial application. SPM’s LVIC offers external capacitor to set this time duration according to various demands.

Bootstrap diode

In addition to basic three-phase inverter topology, more integration is one of challenge to semiconductor companies. The constraint is not technical issue but limited cost and package size. From this point of view, bootstrap diodes seem to be good candidates for the integration. Actually there have been several products on the market which have built-in bootstrap diodes, but its approach is slightly different from a technical viewpoint. One of them is using high voltage junction termination area on the HVIC as a bootstrap diode. Its application is limited to the small power rating under 100W since this approach shows large forward drop voltage and poor dynamics. Around 400W, the discrete FRD is used as a bootstrap diode but due to its limited package size, there is no series resistor (RBS) and therefore need special treatment for large charging current particularly at the initial charging period. Most popular one for over 400W applications is the combination of discrete FRD and discrete resistor. The only demerit of this approach is its large space and corresponding cost-up.

In SPM development, a newly designed bootstrap diode has been adopted and its design target is small chip size and moderate forward voltage drop in order to have equivalent effect of series resistor 20 Ohm. As shown in Figure 4, its voltage drop characteristics are equivalent to the series resistor and general FRD. By virtue of this specialized bootstrap diode, more integration is accomplished while keeping the cost-up at a minimum.

Forward drop voltage of built-in bootstrap diode

Package

The principal factor of developing SPM’s package was to improve cost-to-performance ratio while improving package reliability like thermal cycling and power cycling. It resulted into transfer molded package technology, which had been used for ICs and LSIs products, to be used in power module. Comparing to a conventional power module with a plastic or epoxy resin case, the SPM has relatively simple structure. Power chips and ICs are mounted on the copper lead frame, the substrate material is attached to the frame, and finally molded into epoxy resin.

Thermal dissipation is an important issue in package design because it determines the limit of power capability of the module. And it has strong trade-off relationship to the isolation characteristics. Transfer molded SPM series are using several kinds of isolation substrate according to its power rating and applications as shown in Table 2. By virtue of flexible substrate availability, 600V 3A to 30A power rating can be implemented in Mini-DIP SPM while maintaining PCB footprint and price competitiveness as shown in Figure 5. In addition to higher reliability and thermal performance, patterning flexibility is another merit of DBC (Direct Bonded Copper) substrate. It makes it possible to provide derivative products for versatile application such as power factor correction, switched reluctance motor, where only DBC is changed and other package element is maintained.

SPM product family’s thermal resistance between junction and case according to different current rating

There were a few technical issues to be overcome for DBC high productivity: multi chip mounting and joining technology with DBC substrate and lead frame were developed using screen printing, multi chip mounting and conveyor belt reflow and flux cleaning process. Solder void near zero was acquired by reflow profile condition increasing temperature slope between melting zones and optimized solder material and screen print mask design. The copper thickness of DBC substrate was optimized by fitting package warpage by both simulation and experiment.

Package substrate for SPM series

Synthetic technology including power device, driver IC, packaging and system optimization is required in SPM design under cost constraint. For actual mass production, assembly and testing are also of big importance. Today, the SPM has positioned itself as strong inverter solution in low power motor drives, which will be accelerated more and more.

 

References:

1) S.I. Yong and B.S. Suh, “Smart Power Module – Powering the Motion”, Power Systems Design Europe, September, 2004, pp. 12-17.
2) J.B.Lee, B.C. Cho, D.W. Chung and B.S.Suh, “Design of a High-side Gate Driver using a Mini-SPM”, IPEC 2005.
3) Jong-Tae Hwang, “High Noise Immunity High-Side Gate Driver IC”, Power Systems Design Europe, May 2005, pp.24-28.

 

 

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